一.命令查詢

a). 直接檢視檔案

$ cat /sys/devices/system/cpu/cpu0/cache/

b). getconf 命令

$ getconf -a | grep CACHE
LEVEL1_ICACHE_SIZE                 32768
LEVEL1_ICACHE_ASSOC                8
LEVEL1_ICACHE_LINESIZE             64
LEVEL1_DCACHE_SIZE                 32768
LEVEL1_DCACHE_ASSOC                8
LEVEL1_DCACHE_LINESIZE             64
LEVEL2_CACHE_SIZE                  262144
LEVEL2_CACHE_ASSOC                 4
LEVEL2_CACHE_LINESIZE              64
LEVEL3_CACHE_SIZE                  3145728
LEVEL3_CACHE_ASSOC                 12
LEVEL3_CACHE_LINESIZE              64
LEVEL4_CACHE_SIZE                  0
LEVEL4_CACHE_ASSOC                 0
LEVEL4_CACHE_LINESIZE              0
 

c). dmesg 查詢

[email protected]:~$ dmesg | grep cache
[    0.028000] Dentry cache hash table entries: 1048576 (order: 11, 8388608 bytes)
[    0.028000] Inode-cache hash table entries: 524288 (order: 10, 4194304 bytes)
[    0.028000] Mount-cache hash table entries: 16384 (order: 5, 131072 bytes)
[    0.028000] Mountpoint-cache hash table entries: 16384 (order: 5, 131072 bytes)
[    0.288085] PCI: pci_cache_line_size set to 64 bytes
[    0.305579] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
[    1.914452] xhci_hcd 0000:00:14.0: cache line size of 64 is not supported
[    2.806852] sd 0:0:0:0: [sda] Write cache: enabled, read cache: enabled, doesn't support DPO or FUA
[ 3632.977079] sd 0:0:0:0: [sda] Synchronizing SCSI cache
[ 3633.760411]  cache: parent cpu1 should not be sleeping
[ 3633.762437]  cache: parent cpu2 should not be sleeping
[ 3633.763117]  cache: parent cpu3 should not be sleeping
 

d).Iscpu方式

If you care only about the sizes, try lscpu from util-linux.
Example:

$ lscpu
Architecture:          x86_64
CPU op-mode(s):        32-bit, 64-bit
Byte Order:            Little Endian
CPU(s):                4
On-line CPU(s) list:   0-3
Thread(s) per core:    2
Core(s) per socket:    2
Socket(s):             1
NUMA node(s):          1
Vendor ID:             GenuineIntel
CPU family:            6
Model:                 37
Model name:            Intel(R) Core(TM) i5 CPU       M 560  @ 2.67GHz
Stepping:              5
CPU MHz:               1199.000
BogoMIPS:              5319.88
Virtualization:        VT-x
L1d cache:             32K
L1i cache:             32K
L2 cache:              256K
L3 cache:              3072K
NUMA node0 CPU(s):     0-3
 

e).dmidecode命令

[email protected]:~/share-vm/open-source-code$ sudo dmidecode -t cache
# dmidecode 3.0
Getting SMBIOS data from sysfs.
SMBIOS 3.0.0 present.

Handle 0x0009, DMI type 7, 19 bytes
Cache Information
	Socket Designation: L1 Cache
	Configuration: Enabled, Not Socketed, Level 1
	Operational Mode: Write Back
	Location: Internal
	Installed Size: 128 kB
	Maximum Size: 128 kB
	Supported SRAM Types:
		Synchronous
	Installed SRAM Type: Synchronous
	Speed: Unknown
	Error Correction Type: Parity
	System Type: Unified
	Associativity: 8-way Set-associative

Handle 0x000A, DMI type 7, 19 bytes
Cache Information
	Socket Designation: L2 Cache
	Configuration: Enabled, Not Socketed, Level 2
	Operational Mode: Write Back
	Location: Internal
	Installed Size: 512 kB
	Maximum Size: 512 kB
	Supported SRAM Types:
		Synchronous
	Installed SRAM Type: Synchronous
	Speed: Unknown
	Error Correction Type: Single-bit ECC
	System Type: Unified
	Associativity: 4-way Set-associative

Handle 0x000B, DMI type 7, 19 bytes
Cache Information
	Socket Designation: L3 Cache
	Configuration: Enabled, Not Socketed, Level 3
	Operational Mode: Write Back
	Location: Internal
	Installed Size: 3072 kB
	Maximum Size: 3072 kB
	Supported SRAM Types:
		Synchronous
	Installed SRAM Type: Synchronous
	Speed: Unknown
	Error Correction Type: Multi-bit ECC
	System Type: Unified
	Associativity: 12-way Set-associative

二.程式碼查詢

a). 讀取檔案方式

#include <stdio.h>
int main()
{
   FILE *fp = NULL;
   fp = fopen("/sys/devices/system/cpu/cpu1/cache/index0/size", "r");
   char buf[10];
   if(fp != NULL )
   {
   		 fgets(buf, 10, (FILE*)fp);
   		 printf("%s\n", buf);
   }
   fclose(fp);
}

第二種方式

#include <stdio.h>
#include <unistd.h>
 
int main (void)
{
  long l1_cache_line_size = sysconf(_SC_LEVEL1_DCACHE_LINESIZE);
  long l2_cache_line_size = sysconf(_SC_LEVEL2_CACHE_LINESIZE); 
  long l3_cache_line_size = sysconf(_SC_LEVEL3_CACHE_LINESIZE);
 
  printf("L1 Cache Line Size is %ld bytes.\n", l1_cache_line_size); 
  printf("L2 Cache Line Size is %ld bytes.\n", l2_cache_line_size); 
  printf("L3 Cache Line Size is %ld bytes.\n", l3_cache_line_size); 
 
  return (0);
}

b).獨立的檔案支援多平臺

https://stackoverflow.com/questions/794632/programmatically-get-the-cache-line-size [轉]

#ifndef GET_CACHE_LINE_SIZE_H_INCLUDED
#define GET_CACHE_LINE_SIZE_H_INCLUDED

#include <stddef.h>
size_t cache_line_size();

#if defined(__APPLE__)

#include <sys/sysctl.h>
size_t cache_line_size() {
    size_t line_size = 0;
    size_t sizeof_line_size = sizeof(line_size);
    sysctlbyname("hw.cachelinesize", &line_size, &sizeof_line_size, 0, 0);
    return line_size;
}

#elif defined(_WIN32)

#include <stdlib.h>
#include <windows.h>
size_t cache_line_size() {
    size_t line_size = 0;
    DWORD buffer_size = 0;
    DWORD i = 0;
    SYSTEM_LOGICAL_PROCESSOR_INFORMATION * buffer = 0;

    GetLogicalProcessorInformation(0, &buffer_size);
    buffer = (SYSTEM_LOGICAL_PROCESSOR_INFORMATION *)malloc(buffer_size);
    GetLogicalProcessorInformation(&buffer[0], &buffer_size);

    for (i = 0; i != buffer_size / sizeof(SYSTEM_LOGICAL_PROCESSOR_INFORMATION); ++i) {
        if (buffer[i].Relationship == RelationCache && buffer[i].Cache.Level == 1) {
            line_size = buffer[i].Cache.LineSize;
            break;
        }
    }

    free(buffer);
    return line_size;
}

#elif defined(linux)

#include <stdio.h>
size_t cache_line_size() {
    FILE * p = 0;
    p = fopen("/sys/devices/system/cpu/cpu0/cache/index0/coherency_line_size", "r");
    unsigned int i = 0;
    if (p) {
        fscanf(p, "%d", &i);
        fclose(p);
    }
    return i;
}

#else
	#error Unrecognized platform
	#endif
#endif