1. 程式人生 > >MMU結構以及工作原理(作者:[email protecte

MMU結構以及工作原理(作者:[email protecte

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    MMU的大名,早就聽說了,可是一直不知道它是怎麼工作的,前幾月貌似看的模模糊糊,現在快年關了,來做個了結。在文中我會大量引用英文,並且不做翻譯,因為俺覺得我的英文水平會誤解別人。O(∩_∩)O哈哈~

    One of the key services provided by an MMU is the ability to manage tasks as indepen-dent programs running in their own private memory space. A task written to run under the control of an operating system with an MMU does not need to know the memory
requirements of unrelated tasks. This simplifies the design requirements of individual tasks running under the control of an operating system.

——給每個任務提供獨立的執行空間。

    The MMU simplifies the programming of application tasks because it provides the resources needed to enable virtual memory—an additional memory space that is indepen-dent of the physical memory attached to the system. The MMU acts as a translator, which
converts the addresses of programs and data that are compiled to run in virtual memory to the actual physical addresses where the programs are stored in physical main memory.This translation process allows programs to run with the same virtual addresses while being
held in different locations in physical memory.——MMU作為一個轉換器。程式可以執行在同一塊虛擬記憶體,而各自儲存在不同的實體記憶體。

    We begin with a review of the protection features of an MPU and then present the additional features provided by an MMU. We introduce relocation registers, which hold the conversion data to translate virtual memory addresses to physical memory addresses,
and the Translation Lookaside Buffer (TLB), which is a cache of recent address relocations.We then explain the use of pages and page tables to configure the behavior of the relocation registers.

——這裡介紹重定位暫存器,它儲存轉換虛擬地址到實體地址的資料;介紹旁路緩衝器(TLB),它是存放最近的的地址重定位資訊的cache(快取記憶體);介紹如是使用頁和頁表來重新配置重定位暫存器。

    We then discuss how to create regions by configuring blocks of pages in virtualmemory .We end the overview of the MMU and its support of virtual memory by showing how tomanipulate the MMU and page tables to support multitasking.

——討論通過虛擬記憶體中的塊頁表來配置來建立區域。最後演示使用虛擬記憶體來支援和建立多工作業系統

___________________________________________________________________________

現在來看看這個MMU到底有什麼東西,有什麼特備的硬體結構

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    To permit tasks to have their own virtual memory map, the MMU hardware performs address relocation, translating the memory address output by the processor core before it reaches main memory. The easiest way to understand the translation process is to imagine
a relocation register located in the MMU between the core and main memory.——地址重定位暫存器,其實就是地址轉換器

    Figure 14.1 shows an example of a task compiled to run at a starting address of 0x4000000 in virtual memory. The relocation register translates the virtual addresses ofTask 1 to physical addresses starting at 0x8000000.
    A second task compiled to run at the same virtual address, in this case 0x400000, can be placed in physical memory at any other multiple of 0x10000 (64 KB) and mapped to 0x400000 simply by changing the value in the relocation register.

——為什麼一定要是64KB為倍數的的地址的物理儲存器上?難道這個是MMU有什麼特殊的硬體結構決定了?

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    A single relocation register can only translate a single area of memory, which is set by
the number of bits in the offset portion of the virtual address. This area of virtual memory
is known as a page. The area of physical memory pointed to by the translation process is
known as a page frame.——頁和頁幀

———————————————上面虛擬記憶體的轉換過程了———————————————

    The set of relocation registers that temporarily store the translations in an ARM MMU
are really a fully associative cache of 64 relocation registers. This cache is known as a
Translation Lookaside Buffer (TLB). The TLB caches translations of recently accessed pages.

——重定位暫存器是由64個重定位暫存器cache相連成的,這個cache被稱為旁路緩衝器(TLB),它快取最近訪問頁轉換的資料。——我覺得是地址資料才對,因為ARM9是資料匯流排和地址匯流排分離的。

    In addition to having relocation registers, theMMUuses tables inmainmemory to store
the data describing the virtualmemorymaps used in the system. These tables of translation
data are known as page tables. An entry in a page table represents all the information needed
to translate a page in virtual memory to a page frame in physical memory.

——除了使用重定位暫存器外,MMU還使用在主存中的表來存放描述虛擬記憶體對映的資料,這個表被稱為頁表。

而頁表的每個子表儲存了一個頁轉換到物理儲存器的一個頁幀所需要的資訊。

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    Apage table entry (PTE) in a page table contains the following information about a virtual
page: the physical base address used to translate the virtual page to the physical page frame,
the access permission assigned to the page, and the cache and write buffer configuration for
the page. If you refer to Table 14.1, you can see that most of the region configuration data
in an MPU is now held in a page table entry. This means access permission and cache and
write buffer behavior are controlled at a granularity(粒度) of the page size, which provides finer
control over the use of memory. Regions in an MMU are created in software by grouping
blocks of virtual pages in memory.——MMU區域由在記憶體中的虛擬頁的塊群以軟體方法建立

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    Since a page in virtual memory has a corresponding (連續的)entry (條目)in a page table, a block of
virtual memory pages map to a set of sequential entries in a page table. Thus, a region can
be defined as a sequential set of page table entries. The location and size of a region can be
held in a software data structure while the actual translation data and attribute information
is held in the page tables.

    Figure 14.3 shows an example of a single task that has three regions: one for text, one
for data, and a third to support the task stack. Each region in virtual memory is mapped
to different areas in physical memory. In the figure, the executable code is located in flash
memory, and the data and stack areas are located in RAM. This use of regions is typical of
operating systems that support sharing code between tasks.——作業系統就是這麼設計的?

    With the exception of the master level 1 (L1) page table, all page tables represent 1 MB
areas of virtual memory. If a region’s size is greater than 1 MB or crosses over the 1 MB
boundary addresses that separate page tables, then the description of a region must also

include a list of page tables. The page tables for a region will always be derived from
sequential page table entries in the master L1 page table. However, the locations of the L2
page tables in physical memory do not need to be located sequentially. Page table levels are
explained more fully in Section 14.4.

——難道在wince中的OEMAddresstable中的虛擬記憶體大小都是1M的倍數,且是連續

的是由此而來?(其實wince可以使用不連續的,不過要使用特殊技巧才行)

在實體記憶體中的頁表可以是非連續的。——優龍的bootloader就有此見證!

看看下圖

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MMU是如何實現多工排程的?

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    Page tables can reside inmemory and not bemapped toMMU hardware. One way to build
amultitasking system is to create separate sets of page tables, each mapping a unique virtual
memory space for a task. To activate a task, the set of page tables for the specific task and
its virtual memory space are mapped into use by theMMU. The other sets of inactive page
tables represent dormant tasks. This approach allows all tasks to remain resident in physical
memory and still be available immediately when a context switch occurs to activate it.

——頁表可以駐留在記憶體中,不必對映到MMU硬體。構建多工的一種方法是建立一批

獨立的頁表,每個對映到唯一的任務空間。為了啟用某個任務,對應這個任務的那組頁表

和其虛擬記憶體空間由MMU使用,沒有啟用的頁表代表睡眠的任務。這種方法使所有的任務

可以駐留在記憶體中,當發生上下文切換的時候可以立即使用。

    By activating different page tables during a context switch, it is possible to execute
multiple tasks with overlapping virtual addresses. The MMU can relocate the execution
address of a task without the need to move it in physical memory. The task’s physical
memory is simply mapped into virtual memory by activating and deactivating page tables.

——在上下文切換時候通過啟用不同的頁表,使得在重疊的虛擬地址執行多工

成為可能。MMU可以通過重定位任務地址而不需要移動在記憶體中的任務。任務的

實體記憶體只是簡單的通過啟用與不啟用頁表來實現對映到虛擬記憶體

——My GOD!明白MMU的工作原理了!!!!!!!!!

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    When the page tables are activated or deactivated, the virtual-to-physical address map-
pings change. Thus, accessing an address in virtual memory may suddenly translate to a
different address in physical memory after the activation of a page table. As mentioned in
Chapter 12, the ARM processor cores have a logical cache and store cached data in virtual
memory. When this translation occurs, the caches will likely contain invalid virtual data
from the old page table mapping. To ensure memory coherency, the caches may need
cleaning and flushing. The TLB may also need flushing because it will have cached old
translation data.——注意清理和清除cache哦

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    The effect of cleaning and flushing the caches and the TLB will slow system operation.
However, cleaning and flushing stale (陳舊的,過時的)code or data from cache and stale translated physical
addresses from the TLB keep the system from using invalid data and breaking.

——雖然清理和清除cache和TLB會導致系統執行變慢,但是清理和清除cache中過時的程式碼資料,

或者過時的實體地址,可以避免系統使用無效的資料而崩潰。

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    During a context switch, page table data is not moved in physical memory; only pointers
to the locations of the page tables change.——任務切換如下步驟。

To switch between tasks requires the following steps:
1. Save the active task context and place the task in a dormant state.
2. Flush the caches; possibly clean the D-cache if using a writeback policy.
3. Flush the TLB to remove translations for the retiring task.
4. Configure the MMU to use new page tables translating the virtual memory execution
area to the awakening task’s location in physical memory.
5. Restore the context of the awakening task.
6. Resume execution of the restored task.

Note: to reduce the time it takes to perform a context switch, a writethrough cache
policy can be used in the ARM9 family. Cleaning the data cache can require hundreds of
writes to CP15 registers. By configuring the data cache to use a writethrough policy, there is
no need to clean the data cache during a context switch, which will provide better context
switch performance. Using a writethrough policy distributes these writes over the life of
the task. Although a writeback policy will provide better overall performance, it is simply
easier to write code for small embedded systems using a writethrough policy.

——使用檔案系統的應該使用會寫策略,這樣效率較高。

++++++++++++++++++++++為什麼虛擬記憶體和實體記憶體對映是要固定的?===========

    Typically, page tables reside in an area of main memory where the virtual-to-physical
address mapping is fixed. By “fixed,” we mean data in a page table doesn’t change during
normal operation, as shown in Figure 14.5. This fixed area of memory also contains the
operating system kernel and other processes. The MMU, which includes the TLB shown
in Figure 14.5, is hardware that operates outside the virtual or physical memory space; its
function is to translate addresses between the two memory spaces.

——在執行系統時候不能改變兩者的對映,否則很容易出錯,wince是這樣的,

不知道linux是怎麼樣的了,ADS 下的bootloader也是這樣的。

————————————————方框的是固定對映————————————

參考資料

ARM System Developer's Guide: Designing and Optimizing System Software
——ARM System Developer's Guide: Designing and Optimizing System Software——ARM嵌入式系統開發:軟體設計與優化的英文原版——我個人感覺這是國內翻譯ARM書籍最好的一本之一,比杜XX的ARM體系結構與程式設計好千倍。 本書雖然說軟體設計與優化,但是講的硬體也很多,比如MMU和cache等,講的精彩紛呈:我剛才想寫關於MMU和cache的部落格,發現太龐大,看來這段時間要重新看看這本書才能寫。
下載地址:
http://download.csdn.net/source/904273

ARM920T Technical Reference Manual——不多說了,想了解2440等的bootloader的人一定要看這個東西了,一些協處理器指令講的很詳細
下載地址:http://download.csdn.net/source/903240

ARM Architecture Reference Manual(2nd Edition) ——比較有價值的英文ARM書籍
下載地址http://download.csdn.net/source/901433

轉載請標明:作者[email protected].桂林電子科技大學一系科協,原文地址:http://blog.csdn.net/gooogleman——如有錯誤,希望能夠留言指出;如果你有更加好的方法,也請在部落格後面留言,我會感激你的批評和分享。

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